Program

SW Test Program Overview

The 27th Annual SW Test Workshop will be held at the Rancho Bernardo Inn in San Diego, California, from June 4-7, 2017. The Workshop will begin on Sunday morning with a golf tournament and Sunday afternoon with a topical tutorial, followed by a welcome reception, dinner, and a Keynote Speaker. The Technical Program will start Monday morning with 30-minute presentations in theme-oriented sessions. SW Test EXPO 2017 will showcase many of the key suppliers to the wafer probe industry and, as always, there will be ample opportunities for networking. This year, we will also feature two poster sessions during which attendees can meet with authors face-to-face. The workshop will conclude on Wednesday at Noon after an awards presentation and lunch. Conference registration includes all meals, refreshments, social activities, and technical program and exhibit attendance, as well as the eProceedings.

Full Program

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June 4, 2017 (Sunday)

7:00 AM – 1:00 PM 6th Annual SW Test William Mann Golf Tournament
7:00 – 8:00 Box Breakfast
8:00 Tee Off: Scramble, Reverse Shotgun Format
2:00 PM – 4:00 PM Tutorials Chair: Rey Rincon (NXP Semiconductor – USA)
Sensors at Test – “Magnetic” Probe Cards (Download files)

Dr. Rainer Gaggl and Georg Franz (T.I.P.S. Messtechnik GmbH – Austria)

Alan Wegleitner (Texas Instruments, Inc., USA)

Multiplexer™ – Innovative Vertical Probe Card Structure for High Parallelism Image Sensor Probe Card

Daisuke Miyamoto (SV TCL KK – Japan)

Typical “Pain Points” in Wafer Level Testing of Mixed-Mode Sensor SOCs’

Ranauld Perez (Johnstech International – USA)

New Inspection Solution for Probing Technology

Clark Liu and Tim Yang (PTI – Taiwan)

4:00 PM – 6:00 PM REGISTRATION OPEN

6:00 PM – 7:00 PM WELCOME RECEPTION (Aragon Lawn)

7:00 PM – 8:15 PM BUFFET DINNER (Aragon Ballroom)

Keynote Presentation

8:15 PM – 9:45 PM Evening Session
8:15 – 8:30 Opening Remarks for SW Test 2017 
Jerry Broz, Ph.D., SW Test General Chair
8:30 – 9:45 KEYNOTE
“Emerging Test Methods — How Auto IC Requirements, Adaptive Testing
and Multichip Products are Changing the Industry”

Phil Nigh, Ph.D.
Distinguished Member of Technical Staff
GLOBALFOUNDRIES
Essex Junction, VT

Dr. Phil Nigh is a Distinguished Member of Technical Staff and has been a Test Engineer for over 33 years at IBM and GLOBALFOUNDRIES. He is responsible for defining & driving Test Strategy including test methods, design-for-test, diagnostic methods and Adaptive Testing. He has over 40 world-wide patents. Phil received his PhD from Carnegie Mellon University in 1990. Phil received the Best Paper award at the International Test Conference in 1999 and has done a number of keynote presentations at conferences and workshops. He has organized the “Industry Test Challenges” workshop for over 15 years.

“Emerging Test Methods — How Auto IC Requirements, Adaptive Testing and Multichip Products are Changing the Industry”

Key Industry trends are changing how we Test ICs — and how we guarantee Quality, Reliability and Yield during the production process.   The number of ICs in automobiles is dramatically increasing — and these ICs have very unique requirements.   Leading-edge companies are using more and more “Adaptive Test” methods — that are challenging given our dis-aggregated production test processes.   Also, multichip products (including ICs from multiple suppliers) are finally emerging; but the challenge is that adequate industry support practices are not yet in place.  This talk will both describe these challenges and recommended practices to move the industry ahead.

9:45 PM NETWORKING / HOSPITALITY SUITES

June 6, 2016 (Monday)

7:00 AM – 8:00 AM CONTINENTAL BREAKFAST

7:00 AM – 5:00 PM REGISTRATION

8:00 AM – 8:30 AM Welcome
8:00 – 8:30 Welcome to SWTW-2017
Jerry Broz, Ph.D., General Chair
8:30 AM – 10:00 AM SESSION 1: Diverse Probe Challenges

Session Chair: Jerry Broz, Ph.D., SW Test General Chair

8:30 – 9:00 Forget the Paschen and Embrace Turbulence

Bryan Root (Celadon Systems – USA), Alex Pronin (Keithley Instruments – USA), Bill Funk (Celadon Systems – USA) and Seng Yang (Celadon Systems – USA)

9:00 – 9:30 Automatic Probecard Finding using MSO

Kevin Fredriksen (SPA Software Entwicklungs GmbH – Germany) and Simon Allgaier (Feinmetall GmbH – Germany)

9:30 – 10:00 FeinProbe solution for WLCSP applications

Krzysztof Dabrowiecki (Feinmetall GmbH – Germany)

10:00 AM – 10:30 AM COFFEE BREAK

10:30 AM – 12:00 SESSION 2: Modeling & Measurement

Session Chair: Gunther Boehm (Feinmetall GmbH – Germany)

10:30 – 11:00 Vertical Probe Mechanical and Thermal-electrical Characterization using Finite Element Analysis

Yan Chen (SV TCL – An SV Probe Company – USA)

11:00 – 11:30 Simulating Electrical Performance of Probe-cards to Enable them to Work “Right Out of the Box”

Pankaj Ahirwar (SV TCL – An SV Probe Company – USA)

11:30 – 12:00 Customized Image Processing Solutions for Probe Card Manufacturing, Inspection and Optimization

Dr. Alan Ferguson, Simon Touhy, Michael Cullimore, Riccardo Geremia, Dr. Andrew Kearsley, Dr. Martyn Knowles, Michael Gaukroger, and Dimitris Karnakis (Oxford Lasers – United Kingdom)

12:00 NOON – 1:00 PM LUNCH ON THE LAWN

1:00 PM – 3:00 PM SESSION 3: Memories (HBM, Cu Pillars)

Session Chair: Karen Armendariz (Celadon Systems – USA)

1:00 – 1:30 HBM micro pillar grid array probing challenges

Raffaele Vallauri (Technoprobe Spa – Italy), Dr. Yun Jinyeong (Samsung – Korea), Dr. Kim Jaehong (Samsung – Korea), Marco Prea (Technoprobe – Korea), and Daniele Perego (Technoprobe Spa – Italy)

1:30 – 2:00 Hybrid MEMS Probe Design to Maximize Electrical & Mechanical Wafer Test Performance

Ashish Bhardwaj (FormFactor, Inc. – USA), Amer Cassier (Qualcomm – USA), Amy Leong (FormFactor, Inc. – USA), and Jarek Kister (FormFactor, Inc. – USA)

2:00 – 2:30 Challenges of minimizing scrub mark depth while maintaining low contact resistance on extremely thin probe pads

Blake Rapp and Kurt Guthzeit (Micron Technology, Inc. – USA)

2:30 PM – 3:00 PM COFFEE BREAK

Poster Session 1: 2:30 PM – 3:00 PM

Session Chair: Patrick Mui (JEM America – USA)

  • Reduction Of Exposed Oxide Defect At Wafer Probing Using Lean Six Sigma Approach
    Jonalyn Capua and Doughn Montero (ON Semiconductor – Philippines)
  • Effect of Increasing Overtravel Setting on VHVIC Device using Different Vertical Probe Technology
    Wiljelm Carl Olalia (ON Semiconductor – Philippines)
  • Development of Latest Generation Hole Geometries for Probe Card Applications
    Andrew Webb (OpTek Systems Inc. – USA) and Dr. Mike Osborne (OpTek Systems Ltd. – United Kingdom)
3:00 PM – 4:30 PM SESSION 4: Contact and Performance

Session Chair: Michael Huebner, Ph.D. (FormFactor, Inc. – USA)

3:00 – 3:30 An Advanced Wafer Probing Characterization Tool for Low CRES at High Current

Dr. Oliver Nagler, Francesco Barbon, and Dr. Christian Degen (Infineon Technologies AG – Germany)

3:30 – 4:00 Reducing and stabilization of on-resistance by “DARUMA” stage

Masatomo Takahashi (Tokyo Seimitsu – Japan) and Nobuyuki Toyoda (TESEC – Japan)

4:00 – 4:30 Tokyo Electron TELeMetrics Data collection, analysis, productivity improvement

Shane Pudvah (TEL – USA)

4:30 – 5:00 A Study on Chuck Automatic Tilting and Chuck Force Sensing for Minimizing Probe Pin Damage and Optimizing Overdrive.

Byung-Hyun Shin (Semics – Korea)

5:00 PM – 8:00 PM EXHIBITS OPEN

5:00 PM RECEPTION & CARVING STATION DINNER IN EXPO HALL

June 6, 2017 (Tuesday)

7:00 AM – 8:00 AM CONTINENTAL BREAKFAST

7:00 AM – 3:00 PM REGISTRATION OPEN

8:00 AM – 10:00 AM SESSION 5: Substrates – Space Transformers

Session Chair: Alan Wegleitner (Texas Instruments, Inc. – USA)

8:00 – 8:30 Power Integrity of Space Transformer on Probe Card
Tae Kyun Kim, Yong Ho Cho (Microfriend, Inc. – Korea), Jong Gwan Yook (Yonsei Univ. – Korea), and Sang Kyu Yoo (Samsung Electronics – Korea)
8:30 – 9:00 A proposal of new CIS probe card concept for improvement of PI, SI deviation between Inside DUT and outside DUT
Jung Keun Park (Will Technology – Korea)
9:00 – 9:30 Improvement of High Speed Testing through Increase of Probe Layer for Improved Signal Isolation
Dr. Jun Jie The, Jye Hung, Dr. Soon Leng Tan, Robin Chen, and Jeffrey Lam (GLOBALFOUNDRIES – Singapore) and Adrian Lim (Feinmetall – Singapore)
9:30 – 10:00 Probe Pattern Design for Low-Cost and High-Speed Loopback Test
Norman Hsu (Chunghwa Precision Test Technology Co., Ltd – Taiwan)

10:00 AM – 10:30 AM COFFEE BREAK

10:30 AM – 12:00 SESSION 6: CCC & MAC Methods

Session Chair: Joey Wu (MPI Corporation – Taiwan)

10:30 – 11:00 New method to measure CCC (Current Carrying Capability) of thin probe wire

Tadashi Rokkaku (Probe Innovation USA, LLC – USA)

11:00 – 11:30 Analysis of probe C.C.C. according to temperature and evaluation method

Dr. Sanghun Shin, Seong Yeon Wi, Yong Geon Shin, and Won Ha Jeon (Will Technology – Korea)

11:30 – 12:00 Pulsed CCC and MAC: a numerical model for vertical probe design

Dr. Emanuele Bertarelli, Daniele Acconcia, Raffaele Vallauri, and Dr. Andrea Calaon (Technoprobe Spa – Italy)

12:00 NOON – 1:00 PM LUNCH ON THE LAWN

1:00 PM – 3:00 PM SESSION 7: Challenges of Probing Ever-Finer Geometries

Session Chair: Mark Ojeda (Cypress Semiconductor – USA)

1:00 – 1:30 Advanced Vertical Technologies for Low Damage Probing of Bumps, Pillars, and Pads

Spreadtrum PE Team (Spreadtrum Communications – China), Gwen Gerard (Texas Test Corporation – Taiwan), Jean-Pierre Gibaux (Texas Test Corporation – Taiwan), and Jerry Broz, Ph.D., (MJC Electronics – USA) and Darren Aaberge (Micronics Japan – Japan).

1:30 – 2:00 A Novel Superior Low Force Probe Geometry enabling probe on Micro Bump with very small pitches
Dr. Matthias Schnaithmann (FeinMetall GmbH – Germany)
2:00 – 2:30 Probing Challenges with Cu-Pillar Bumps

Phill Mai (JEM America Corp. – USA)

2:30 – 3:00 A Full-Automatic Test System for Characterizing Wide-I/O Micro-Bump Probe Cards Erik Jan Marinissen, Ferenc Fodor, Bart De Wachter (IMEC – Belgium) and Joerg Kiesewetter (Cascade Microtech – Germany), Eric Hill (Cascade Microtech, Inc. – USA), and Ken Smith (Cascade Microtech, Inc. – USA)
3:00 PM – 5:00 PM EXHIBITS OPEN
3:00 – 5:00 PM Break – Refreshments Served in Expo Hall

Poster Session 2: 10:00 AM – 10:30 AM

Session Chair: John Caldwell (Micron Technology, Inc. – USA)

  • Getting more CoO from you PCA
    John Strom (Rudolph Technologies – USA)
  • The development of a testing facility of contactors with fine pitch size
    Woo Seong Che (Kyungsung University – Korea)
    Kyung-Woo Kim (Sysdine – Korea)
  • CCW – A whole new way to clean the prober
    Jory Twitchell (NXP Semiconductor – USA), Mark Stark (International Test Solutions – Reno, USA), Danele Helapitage (NXP Semiconductor – USA), and Rey Rincon (NXP Semiconductor – USA)
  • An Automated Bad Blocks Analysis System Development for NAND Flash
    Sung-Kwan Jung (Samsung Electronics – Korea)

Tuesday Evening SOCIAL

6:00 PM – 9:00 PM SOCIAL: “New Orleans River Boat” … Casino Night and Social Club
6:00 – 9:00 Cocktail Reception, Dinner, and Entertainment

9:00 PM NETWORKING / HOSPITALITY SUITES

June 7, 2016 (Wednesday)

7:00 AM – 8:00 AM CONTINENTAL BREAKFAST

7:30 AM – 10:00 AM REGISTRATION OPEN

8:00 AM – 10:00 AM SESSION 8: RF & Radar

Session Chair: Darren James (Rudolph Technologies – USA)

8:00 – 8:30 Production Level On-Wafer Probe of Multi-Channel 77 GHz Radar Transceiver Chipset

Jory Twitchell and Jeffrey Finder (NXP Semiconductor – USA)

8:30 – 9:00 Evaluation of RF Calibration Substrate Lifetime and Accuracy for mW Production Test Cells

Daniel Bock (Cascade Microtech – USA)

9:00 – 9:30 MEMS process on RF Probe Card

Alex Wei, Morgan Ku, James Wang, and Yock Hsu (MPI Corporation – Taiwan)

9:30 – 10:00 Katana RFx: A New Technology for Testing High Speed RF Applications Within TI

Brandon Mair (Texas Instruments, Inc. – USA)

10:00 AM – 10:30 AM COFFEE BREAK

10:30 AM – 12:00 SESSION 9: Process Improvement

Session Chair: Patrick Mui (JEM America – USA)

10:30 – 11:00 Verification of Singulated HBM2 stacks with Die Level Handler

Quay Nhin (FormFactor, Inc. – USA) and David Armstrong (Advantest – USA)

11:00 – 11:30 Study on 2D MEMS probe card manufacturing by using laser micro-bonding process

Dr. Gi-Jung Nam, Dal-Sung Moon, Kyo-Keun Im, and Man-Seob Lee (Dawon Nexview – Korea)

11:30 – 12:00 Awards Presentations
Jerry Broz and Rey Rincon (SW Test General Chair and Program Chair)
Presenter: Jerry Broz (SW Test General Chair)

12:00 NOON – 12:30 PM AWARDS & LUNCH ON THE LAWN

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