Program for SWTest Untethered 2020

Times in PST |  Program subject to change
last revised: 11/5/2020

Wednesday, November 11, 2020
8:00 – 9:00 Soft Expo Open/Swag Giveaway
9:00 – 10:00 Welcome and Keynote
9:00 – 9:10 Welcome To SWTest Untethered

Jerry Broz, Ph.D.
SWTest Conferences General Chair

Dr. Jerry Broz serves as General Chair for SWTest and SWTest Asia Conferences. He is currently the SVP of Technology Development at International Test Solutions, Reno, NV. He received his Ph.D. in Mechanical Engineering from the U. of Colorado at Boulder. Prior to joining ITS in 2003, Dr. Broz was Member of Technical Staff at Texas Instruments and has worked in probe technology since 1995. He is an IEEE Sr. Member, Golden Core Member, and the Co-Chair of the Probes-Prober-Socket-Handler TWG for the EPS-IEEE HiR Roadmap. Jerry is inventor on numerous domestic and international patents related to wafer-level and package-level test. He has authored more than 125 technical papers and presentations.

9:10 – 10:00 Moore’s Law and the Future of Test

Pooya Tadayon, Ph.D.
Intel Fellow
Technology and Manufacturing Group
Director, Test Probe Technology
Intel Corporation

Abstract:
Moore’s Law has fueled the semiconductor industry for the last 50 years and as scaling has slowed down, attention is being shifted towards die disaggregation and heterogeneous integration. This in turn is driving the need for advanced packaging, which drives the need for a true known-good-die (tKGD) coming out of wafer test. Achieving a tKGD places significant challenges on the test platform and test tooling; these include, but are not limited to, thermal management, power delivery, mechanical state of the device, and test content. Addressing these challenges, in an economically viable way, is key to advancing Moore’s Law and will require a high degree of innovation from players across the industry to enable.
10:00 – 11:00 Presentation Sessions

Session Chair: Geert Gouwy

Geert Gouwy received his master’s degree in Electronics in 1989 from the KIHO – Belgium. He started his professional career as development engineer in Bulcke Hybrid technology working on Chip On Board projects. In 1994 he joined Melexis where he took different job positions. Geert has more than 30 years of experience in the semiconductor business, specialized in probing (wafer testing). The last decade of his career he was responsible for the setup of new probing production lines worldwide (Bulgaria, Malaysia, France) till audit acceptance and managed automation projects for improved efficiency and cost reduction in probing department. As of today, Geert provides consulting services for efficient and cost-effective probing using automation, standardization and lean approach in line with technical, commercial and quality methodology. Next to his probing knowledge he is passionate for guiding (WWI, Flanders & Bulgaria) and he is also member of the local Red Cross board.

10:00 – 10:30 Test Challenges and Solutions for Testing Wi-Fi 6E, UWB and 5G NR IF Devices in the 3-12 GHz Range

Jeorge Hurtarte, Ph.D.
Teradyne, Inc.

Dr. Jeorge S. Hurtarte, Wireless Product Marketing Strategist, Teradyne. Dr. Jeorge S. Hurtarte is currently a Wireless Product Marketing Strategist at Teradyne, Boston, USA.  Dr. Hurtarte has held various technical and management positions at Teradyne, LitePoint, TranSwitch, and Rockwell Semiconductors. He holds Ph.D. and B.S. degrees in electrical engineering, an M.S. in telecommunications, and an M.B.A. Dr. Hurtarte has served on the Advisory Board of Directors of the Global Semiconductor Alliance, TUV Rheinland of North America, and the NSF’s Wireless Internet Center for Advanced RF Technology.  He is the secretary of the IEEE 802.11ay task group. Dr. Hurtarte is also a professor at the University of California, Santa Cruz and at the University of Phoenix, Bay Area, California.  He is also the lead co-author of the book Understanding Fabless IC Technology.

10:30 – 11:00 5G: How to be Heard in a Crowded Room

Daniel Bock, Ph.D.
Formfactor, Inc.

Daniel Bock got his Ph.D. in Physics at Carnegie Mellon University in 2006, working on Superconducting Nanowire Bolometers in the NanoFabrication Lab.  He then went to work in 2007 with Physical Optics Corporation in Torrance, CA. There, he was awarded more than $4M in SBIR research grants from the Department of Defense, developing innovative high power tunable filters for use in Electronics Warfare and Electronics Attack systems.  He joined the Cascade Microtech Business Unit in June of 2012.  Since joining, he has been working to extend the mmWave bandwidth of Pyramid Probe technology, including RF test of automotive radar devices.  He has also led the development of the Custom Calibration Substrate (Custom ISS) product line to supplement the standard ISS line.

11:00 – 11:30 Break/Expo Open
11:30 – 13:00 Presentation Sessions

Session Chair: Karen Armendariz
Celadon Systems, Inc.

Karen is currently the President and CEO of Celadon System’s, The Home of Peace of Mind Probing, a US-based on-wafer probing solutions provider focused on the design and manufacturing of advanced probe card solutions. Karen has worked in the semiconductor industry for 25 years holding various leadership roles in engineering, manufacturing, sales, and marketing. She started at Intel Corporation then on to National Semiconductor, where she was responsible for managing a backend microprocessor test floor. For over 20 years, Karen has worked with a variety of probe cards and probe card technologies. Karen has authored several forward-thinking publications relevant to on-wafer probing solutions. Karen holds a bachelor’s degree in Electrical Engineering from the University of Oklahoma as well as an MBA from Oklahoma City University.

11:30 – 12:00 Opto-electronical probe card for high-volume wafer level test of photonic integrated circuits

Tobias Gnausch
Jenoptik, AG

Tobias Gnausch is Product Manager for Test & Measurement in the Strategic Business Unit “Semiconductor & Advanced Manufacturing” of Jenoptik. He received his diploma in Technical Physics from the University of Jena in 2005, with the specialization on wave-optical design. Following his diploma, Tobias worked as a mechanical engineer and hardware developer for interferometric stylus measurement systems at BOSCH, Stuttgart. He also gained experience in stray light measurements and designing DUV-goniometer for this type of measurements.

In 2008, he joined JENOPTIK as an optical designer for diffractive optical elements and systems, such as customized diffractive diffusers and beam splitters. With the internal change to the product management department in 2012, he was responsible for the complete product life cycle of certain UV- micro-optics used in high-end semiconductor equipment. Beginning of 2016, he took over the P&L responsibility for new product developments in the ‘Advanced Manufacturing’ sector of the Business Unit. This includes the product development the novel opto-electronical probe card for PIC testing, which he supervised from the beginning.

12:00 – 12:30 Extending burn-in test at full wafer level to reduce overall cost of test at HVM

Alessandro Antonioli
Technoprobe S.p.A.

Graduated in Solid State Physics at Milan State University  with master thesis in Flash-Memories, Alessandro has 26 years of experience in semiconductor electronics world. Today Director Marketing and Business Development he has also covered sales at Technoprobe for Probe Card solution for semiconductor wafer sort testing for the past 6 years. He has a deep knowledge on semiconductor testing and product engineering as well as reliability, to IC’s applications. Started his carrier as engineering at STMicroelectronics, he moved to Field Application at IDT and Sales at LSI and Avago, gaining a wide knowledge of semiconductor market and applications.

Sebastiano Grimaldi
STMicroelectronics

Studies in electronic with specialization in electrical testing of power devices at wafer level and package level. Sebastiano has 36 years of experience in semiconductor electronics world. Today EWS Operations Manager in STMicroelectronics. He has also covered, among 36 years in STM, most of the Wafer manufacturing process steps starting from Epitaxy growth until the final test of the packaged device.

12:30 – 13:00 Challenges of Trench Probing

Jory Twitchell
NXP Semiconductor

Jory has worked for NXP Semiconductor, formerly Motorola and Freescale, for the past 20 years. He started his career at NXP as a process engineer but found himself drawn to the challenges associated with probe hardware. This curiosity led him to transition to a hardware engineering position with the Hardware Center of Excellence Group which is focused on optimizing test. Jory found over the years the easiest thing to fault when things go wrong is the probe hardware. As a result, Jory is now strong like an alloy but still flexible enough to handle the most difficult situations.

Karan Maniar
Nidec SV TCL

Karan is a Mechanical Engineer with Nidec SV TCL in Tempe, Arizona. Karan is responsible for working with the Nidec SV TCL Engineering Team on various product development and capability enhancement projects. Karen has experience with several design and simulation software platforms and analytical equipment. Karan is a graduate of Mumbai University, India and Arizona State University holding both a Bachelor of Science and a Master’s Degree in Mechanical Engineering.

13:00 – 14:00 Lunch Break/Expo Open
14:00 – 15:00 Welcome and Keynote
14:00 – 14:10 Welcome To SWTest Untethered

Jerry Broz, Ph.D.
SWTest Conferences General Chair

Dr. Jerry Broz serves as General Chair for SWTest and SWTest Asia Conferences. He is currently the SVP of Technology Development at International Test Solutions, Reno, NV. He received his Ph.D. in Mechanical Engineering from the U. of Colorado at Boulder. Prior to joining ITS in 2003, Dr. Broz was Member of Technical Staff at Texas Instruments and has worked in probe technology since 1995. He is an IEEE Sr. Member, Golden Core Member, and the Co-Chair of the Probes-Prober-Socket-Handler TWG for the EPS-IEEE HiR Roadmap. Jerry is inventor on numerous domestic and international patents related to wafer-level and package-level test. He has authored more than 125 technical papers and presentations.

14:10 – 15:00 Probe in the Spotlight – enabling advanced packaging, chiplets, and heterogenous integration

Michael D. Slessor, Ph.D.
Chief Executive Officer
FormFactor, Inc.

Abstract:
To offset the slowing of front-end-driven Moore’s Law and sustain the innovation trajectory that has fueled fifty-plus years of semiconductor industry growth, the development of advanced packaging is rapidly accelerating. As industry focus moves from front-end fab to post-fab integration, wafer probe is taking a prominent role in enabling a variety of advanced-packaging schemes like heterogenous integration of chiplets. This rise in prominence is being driven by two basic trends, one economic and one technical. On the economic front, surprisingly high pre-assembly chiplet yields are required for viable composite product yields, driving increased test fidelity and coverage. On the technical front, chiplet-to-chiplet interconnect structures are at least an order of magnitude denser than traditional flip-chip interconnect, driving a corresponding intensification in both probe pitch and probe count. As a consequence, advanced packaging is driving more probes, on more probe cards, with more challenging requirements for the wafer test community, pushing us into the spotlight previously occupied by our friends in the fab.
15:00 – 15:30 Break/Expo Open
15:30 – 16:30 Presentation Sessions

Session Chair: Patrick Mui
JEM America Corp

Patrick graduated from San Jose State University in Mechanical Engineering and later earned an MBA degree from California State University East Bay. He started his career as design engineer at JEM America 26 years ago. He held a variety of roles in both engineering and sales areas before serving as President of JEM America. His main focus includes probe card technology development and production process improvements. In recent years, he has been concentrating on marketing and business development efforts for advanced probe card such as high pin count MEMS probe cards and RF application for logic devices. Industry involvement includes SWTW program committee and IEEE-EPS HIR Probes-Prober-Socket-Handler Technical Working Group.

15:30 – 16:00 High-speed PCB electrical characterization with good stability and repeatability

Adolph Cheng
MPI Corporation

Adolph Cheng was born in Tainan, Taiwan. He received the Master’s degree in Institute of Electro-Optical and Materials Science from National Formosa University(NFU), Yunlin, Taiwan, in 2012. In 2013, he joined the electrical RD division of the Probe Card operation center, MPI Corporation, where he is currently a senior engineer. His content of the work and expertise include the electrical correction technology, radio frequency probe development, Probe Card for high-speed/frequency electronic systems, and electrical characterization development.

Steven Wu
MPI Corporation

16:00 – 16:30 Innovative strategies for improved test measurements using Kelvin contacts with a Flying prober

Sebastiano Grimaldi
STMicroelectronics

Studies in electronic with specialization in electrical testing of power devices at wafer level and package level. Sebastiano has 36 years of experience in semiconductor electronics world. Today EWS Operations Manager in STMicroelectronics. He has also covered, among 36 years in STM, most of the Wafer manufacturing process steps starting from Epitaxy growth until the final test of the packaged device.

 

Alessandro Antonioli
Technoprobe S.p.A.

Graduated in Solid State Physics at Milan State University  with master thesis in Flash-Memories, Alessandro has 26 years of experience in semiconductor electronics world. Today Director Marketing and Business Development he has also covered sales at Technoprobe for Probe Card solution for semiconductor wafer sort testing for the past 6 years. He has a deep knowledge on semiconductor testing and product engineering as well as reliability, to IC’s applications. Started his carrier as engineering at STMicroelectronics, he moved to Field Application at IDT and Sales at LSI and Avago, gaining a wide knowledge of semiconductor market and applications.

16:30 – 16:45 Awards
16:45 – 18:00 Social Hour/Scavenger Hunt/Expo Open, Swag Giveaway

We’d like to thank our SWTest Untethered 2020 Sponsors

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